Background

LCD driver IC’s are found in almost all Consumer Electronics devices nowadays ranging from Personal Digital Assistant (PDA), over mobile phones to Portable Media Players (PMP). Similar to DRAM, the LCD driver IC market is a very competitive section of the semiconductor market. Moreover, for mobile panels in consumer electronics, the product life time is between 1 and 3 years and due to the fast IC price erosion, the high margin sales occur only in the first 6 months. This leads to extremely short development cycles, leaving no room for failure.
Panel IC makers need low cost production to beat the competition. This is achieved through the use of mature technology nodes (0.35um to 130nm), reduction of available process options (limited number of metal layers) and strong focus on IO area reduction including “circuit under pad” (CUP) or “Bond over Active” (BOA) approaches. Beside the cost, IC makers differentiate in features such as on-board memory, low power consumption, Bill Of Material (BOM) reduction, display resolution, color palette. 

ESD complexity

Display driver IC’s typically use two or more voltage domains: one for the logic, one for the memory functions and another, higher voltage for driving the panel pixels. This leads to an increase of pin combinations to be tested during ESD stress testing. Moreover, many small panel driver IC’s use on-chip charge pump circuitry to generate additional voltage levels.
The higher voltage domain used in the process nodes typically introduces additional sensitive elements such as the HV output drivers, analog circuitry and parasitic bipolar transistors.
To ensure competitive advantage, the main focus is to reduce the IO ESD area. The small pad pitch, Circuit Under Pad (CUP) requirements and the specific IC aspect ratio require state-of-the-art ESD solutions for the power protection. Also the leakage of the ESD protection cells must be limited because many of the Consumer Electronics appliances (PDA, mobile phone) are powered from a battery.

Experience from Sarnoff

Sarnoff has developed ESD solutions for a number of customers (IDM and foundry) in the field of LCD driver IC applications. Currently the following IC applications are available on the market:

• 0.6um – LCD driver application
  • 20% die size reduction
• 0.5um – 43V OLED application
  • 10% die size reduction
    
• 0.35um – 16V
• 0.3um – 13.5V TFT application
  • 18mm x 0.8mm chip size
  • 37um bond pad pitch
  • 30um IO pitch, power clamp intermixed
  • IO, ESD under bond pad – CUP
• 0.25um – 25V
• 0.13um – 30V TFT application
  • 22um pad pitch size
  • IO, ESD under bond pad – CUP
  • 10% die size reduction

Key technical benefits for working with Sarnoff

IC designers have worked with Sarnoff to Reduce the die cost by drastically shrinking the IO area.
For LCD driver IC’s, Sarnoff has focused on different items:

• Area efficient solutions: win business, volume and margins
  • 10-20% die size reduction
  • Small IO pitch
  • Total ESD area reduction > 30%
• Scalable ESD performance: reach any ESD requirement
• Low leakage and Latch-up immune
• Over voltage tolerant options available
• No need for process changes for ESD solutions

Customer testimonials

• Mr.Shiratori, Deputy General Manager, Display Driver Division of Oki’s Silicon Solution Company.
  • “We have implemented these TakeCharge devices in our various high volume products, such as LCD and OLED driver devices, where they deliver substantial added value for Oki and its customers.”   [read more]
• Shinya Kamiyama, General Manager of Epson’s Foundry Business Division
  • “Epson achieved such great results with Sarnoff’s TakeCharge that we decided to extend its use to our foundry customers. Thanks to Sarnoff’s technology, we are pleased to provide our foundry customers with further improved ESD support and this means that we are able to get our customer’s products to market cheaper and faster—a key advantage in such a fast moving and highly competitive market.”   [read more]
• Ryo Ogura, the ESD project leader and Managing Director of NJR
  • “Smaller ICs can help LCD display manufacturers meet the cost pressures they face, and also offer an opportunity to develop even more compact designs. Our engineers achieved this breakthrough IC design for our customers just 8 months after we implemented the new technology, with no redesigns required.”
  • New Japan Radio announced that its engineering team has achieved a reduction of 33% in driver size and a drastic decrease in overall device size for LCD driver ICs. The company used a customized version of the TakeCharge® design technology.   [read more]
• Fumihisa Nakamura, Category Director, Display Driver and PDP, System LSI Division of Matsushita Semiconductor Company
  • “TakeCharge technology can reduce the capacitance of the input and output (I/O) pins of HV-CMOS IC’s. Therefore, its application can reduce the power required to drive the data bus”

Relevant conference and journal publications

Sarnoff engineers frequently publish technical peer-reviewed papers about the TakeCharge ESD solutions. A selection of these publications regarding LCD driver IC's is provided below

• ESD protection solutions for high voltage technologies - Microelectronics Reliability (2005)
• High Holding Current SCRs (HHI-SCR) for ESD Protection and Latch-up Immune IC Operation - EOS/ESD symposium (2002)